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标签: 3d
此标签下有11条笔记。
2026年8月25日
ThAME: 3D Memory-Enabled Heterogeneous Accelerator for LLM MoE
3d
hybrid-bonding
chiplet
noc
moe
llm
inference
accelerator
memory
interconnect
packaging
architecture
2026年8月25日
3DLS: A 3D Logic-Stacked Architecture for Disaggregated LLM Serving
3d
chiplet
hybrid-bonding
tsv
interconnect
disaggregated-inference
inference
serving-system
kv-cache
communication
llm
latency
throughput
architecture
2026年8月25日
Mozart: Modularized and Efficient MoE Training on 3.5D Wafer-Scale Chiplet Architectures
wse
chiplet
moe
training
hybrid-bonding
3d
noc
interconnect
parallelism
communication
llm
architecture
now
network-on-wafer
2026年8月25日
Through-Silicon Via: A 3D Technology Road Map (and Earlier Survey Work)
3d
tsv
interconnect
through-silicon-via
physical-layer
architecture
2026年8月25日
Network Design for Wafer-Scale Systems with Wafer-on-Wafer Hybrid Bonding
wse
now
network-on-wafer
wafer-on-wafer
hybrid-bonding
noc
interconnect
chiplet
mesh
routing
3d
packaging
training
llm
architecture
2026年8月25日
Monolithic 3D: A New Era of Integration (and Earlier Source Lines, e.g., Batude et al. ICCAD 2011)
3d
monolithic
tsv
sequential-integration
integration
interconnect
architecture
2026年8月25日
Feero & Stan: Networks-on-Chip in a Three-Dimensional Environment (and Related 3D Mesh Baseline Work)
3d
mesh
tsv
noc
routing
interconnect
architecture
baseline
2026年8月25日
Cu-Cu Hybrid Bonding: A New 3D Integration Technology (Multiple 2019–2025 Sources)
3d
hybrid-bonding
cu-cu
microbump
tsv
interconnect
architecture
commercial
2026年8月24日
Network-on-Wafer
now
network-on-wafer
wafer-on-wafer
wse
noc
interconnect
hybrid-bonding
chiplet
mesh
3d
packaging
fabric
architecture
2026年8月21日
3D Stacking Technologies
3d
tsv
monolithic
hybrid-bonding
interconnect
architecture
packaging
chiplet
wse
noc
2026年8月21日
Through-Silicon Via (TSV) Physical Layer
3d
tsv
physical-layer
interconnect
through-silicon-via
architecture
noc